The Programmable Logic Array (PLA) macro is a physical structure which simplifies LSI chip design while yielding high density and good performance. In addition, the inherent order and regularity of ...

Compared with random logic circuits, memory-type circuits are more suitable for LSI realization since their iterated structure of identical cells results in higher transistor density and higher yield.

Californian startup Adaptive Silicon has publicly unveiled the design that the company will use to bring its own form of programmable logic to ASICs. In a break from traditional programmable-logic ...

That EPROMs, EEPROMs and kin can be used as programmable logic should probably not come as a major surprise, but [Jimmy] has created a Lisp-based project that makes using these chips as a logic ...

A bit of history The first practical programmable logic chips, known as PLAs (programmable logic arrays), became available in the mid 1970s. Things really took off though when MMI introduced a ...

Advanced logic design techniques using field programmable gate arrays (FPGAs), programmable logic devices, programmable array logic devices, and other forms of reconfigurable logic. Architectural ...

In those days, programmable devices consisted of PALs (programmable array logic devices) and CPLDs (complex programmable logic devices), which were essentially small sets of AND-OR planes with ...

As reported in Advanced Photonics, they developed a large-scale optical programmable logic array (PLA) capable of handling more complex computations.