Design-Reuse

Designing low-power sequential circuits using clock gating

With shrinking technologies, rapid multiplication of clock frequencies, and increasing emphasis on power reduction, low-power design is taking on a vital role. Design teams can no longer afford to ...
IEEE

Clock gated low power sequential circuit design

Abstract: In this work, our focus is on study and analysis of various clock gating technique and design and analysis of clock gating based low power sequential circuit at RTL level. Virtex-6 is 40-nm ...
IEEE

Clocked Sequential Circuits

Abstract: This chapter contains sections titled: Clocked Fundamental-Mode Circuit Operation, Clocked Pulse-Mode Circuit Operation, Other Types of Memory Elements, Synchronizing Circuits, Control ...
unb.ca

Contract Academic Position Details

Switching algebra and its application in analysis and synthesis of combinational and clocked sequential circuits; minimization and realization methods. Universal ...